In manufacturing semiconductor devices for integrated circuits (ICs), especially for very-large-scale-integration (VLSI), the critical dimension (CD) of IC devices has become smaller and smaller. Accordingly, the channel length of the MOSFET device has been reduced. However, with the continuous reduction of the channel length, the distance between the source region and the drain region of the device has been reduced as well. As a result, the control ability of the gate structure of the MOSFET device on the channel region becomes weaker, and it is more difficult for the gate structure to pinch off the channel region. Thus, the subthreshold leakage phenomenon, i.e., the short-channel effects (SCEs), is easy to occur.
Thus, to better adapt the reduction of the CD, the semiconductor technologies have gradually transformed from planar MOSFET transistors to three-dimensional transistors that have better performances. FinFET transistors are a type of three-dimensional transistors. The gate of an FinFET is able to control the ultra-thin components (i.e., fins) from at least two sides. Comparing with the planar MOSFET device, the control ability of the gate on the channel region of the FinFET may be increased. Thus, the short-channel effect is effectively reduced.
However, it is desirable to further improve the electrical properties of conventional FinFETs. The disclosed methods and semiconductor structures are directed to solve one or more problems set forth above and other problems in the art.